RTL Instantiation & Wiring

1. Drag modules from the Bin to the Board.    2. Click ports to wire them up.

Block Diagram (system_top)
1. Drag modules from the Component Bin to the dotted zones.
2. Click a source port (right side) then a destination port (left side) to wire them.
module system_top COMPONENT BIN (Drag modules from here) Place Generator Place Filter Place Display generator u_gen data_out valid_out filter u_filt data_in val_in result display u_disp pixel_in
Drag modules to their zones...
Verilog Source