⚡
Two Layers of Abstraction
Physical
Voltages
5.0V
High Voltage
0V
Low Voltage
Symbolic
Meaning
HIGH
or "True"
LOW
or "False"
Binary
Digits
1
0
Default Positive Logic (High-True)
Modern digital design uses positive logic as the universal default: High = 1, Low = 0. When reading documentation or writing code, assume positive logic unless explicitly indicated otherwise.
📊 "High" Voltage Varies by Technology
5.0V TTL
3.3V LVCMOS
1.8V Low Power
1.2V Ultra LP
📜
Mixed-Logic Artifacts You'll Encounter
While positive logic dominates, historical practices and engineering trade-offs left traces in notation, vocabulary, and schematics that you need to recognize.
📝 Active-Low Notation Styles
CS Overbar (traditional)
/CS Slash prefix (ASCII-friendly)
CS_N _N suffix (Verilog/VHDL)
nCS n prefix (some vendors)
💬 Vocabulary to Know
"Asserted" — signal is in its active state
"Deasserted" — signal is inactive
"Active-low" — asserted when LOW
"Active-high" — asserted when HIGH
Using "asserted" avoids confusion about whether 0 or 1 means "on"
◯ Bubble Notation on Schematics
No bubble Active-high
Output bubble Active-low output
Input bubble Active-low input
🔌 Common Active-Low Signals
/CS Chip Select
/RST Reset
/IRQ Interrupt
/WE Write Enable
/OE Output Enable
/SS SPI Select
🔄 Why This History Matters: De Morgan's Theorem
NAND ≡ OR with inverted inputs
Engineers historically used "negative logic" thinking to optimize gate-level designs. A physical NAND gate can be drawn as an OR with input bubbles—same silicon, different interpretation. You'll see this equivalence in older texts and optimization techniques.